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On Serial-Input Multipliers for Two's Complement Numbers
September 1989 (vol. 38 no. 9)
pp. 1341-1345
The author shows that a multiplier already proposed by T. Rhyne and N.R. Strader for unsigned numbers can be used for two's complement numbers as well, provided only that the content of the input registers is held constant, after the introduction of the operand's sign bits, for a number of clock periods equal to the operand's length. The result is derived by the properties of sign-extended two'

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[7] T. Rhyne and N. R. Strader, II, "A signed bit-sequential multiplier,"IEEE Trans. Comput., vol. C-35, no. 10, pp. 896-901, Oct. 1986.

Index Terms:
serial-input multipliers; two's complement numbers; sign-extended; linear array; parallel counters; static registers; adders; carry registers; digital arithmetic; multiplying circuits.
Citation:
L. Dadda, "On Serial-Input Multipliers for Two's Complement Numbers," IEEE Transactions on Computers, vol. 38, no. 9, pp. 1341-1345, Sept. 1989, doi:10.1109/12.29478
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