Issue No.09 - September (1989 vol.38)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.29477
A general design approach for self-diagnosis of faulty clocking modules in a fault-tolerant clock synchronization (FTCS) system is presented. The approach is based on a statistical testing method. The major advantages are better self-stability control and lower overhead. The design methodology includes a self-diagnosis algorithm to transform a partially self-stabilizing clocking system into a s
design approach; self-diagnosis; fault-tolerant clock synchronization; faulty clocking modules; statistical testing method; self-stability control; self-diagnosis algorithm; self-stabilization; system availability; transformation overhead; clocks; fault tolerant computing; synchronisation.
M. Lu, D. Zhang, T. Murata, "A Design Approach for Self-Diagnosis of Fault-Tolerant Clock Synchronization", IEEE Transactions on Computers, vol.38, no. 9, pp. 1337-1341, September 1989, doi:10.1109/12.29477