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Improved Techniques for Estimating Signal Probabilities
July 1989 (vol. 38 no. 7)
pp. 1041-1045
The problem is presented in the context of some recent theoretical advances on a related problem, called random satisfiability. These recent results indicate the theoretical limitations inherent in the problem of computing signal probabilities. Such limitations exist even if one uses Monte Carlo techniques for estimating signal probabilities. Theoretical results indicate that any practical meth

[1] F. Brglez, "On testability analysis of combinational networks," inProc. IEEE Symp. Circuits Syst., 1984, pp. 221-225.
[2] F. Brglez and H. Fujiwara, "A neutral netlist of 10 combinational benchmark circuits and a target translator in Fortran," inProc. IEEE Int. Symp. Circuits Syst., June 1985.
[3] R. K. Gaeda, M. R. Mercer, and B. Underwood, "Calculation of greatest lower bounds obtainable by the cutting algorithm," inProc. Int. Test Conf., 1986, pp. 498-505.
[4] M. R. Garey and D. S. Johnson,Computers and Intractability: A Guide to Theory of NP-Completeness. San Francisco, CA: Freeman, 1979.
[5] R. M. Karp and M. Luby, "Monte-Carlo algorithms for enumeration and reliability problems," inProc. IEEE Symp. Foundations Comput. Sci., 1983, pp. 56-64.
[6] D. E. Knuth, "Estimating the efficiency of backtrack programs,"Math Comput., vol. 29, pp. 121-136, 1975.
[7] B. Krishnamurthy, "Short proofs for tricky formulas,"Acta Inform., vol. 22, pp. 253-275, 1985.
[8] E. J. McCluskey, "Probability models for logic networks," inProc. Manitoba Conf. Numer. Math., 1974, pp. 21-28.
[9] K. P. Parker and E. J. McCluskey, "Analysis of logic circuits with faults using input signal probabilities,"IEEE Trans. Comput., vol. C-24, pp. 573-578, 1975.
[10] K. P. Parker and E. J. McCluskey, "Probabilistic treatment of general combinational networks,"IEEE Trans. Comput., vol. C-24, pp. 668-670, 1975.
[11] J. Savir, G. Ditlow, and P. H. Bardell, "Random pattern testability," inProc. IEEE Symp. Fault Tolerant Comput., 1983, pp. 80-89.
[12] S. C. Seth, L. Pan, and V. D. Agrawal, "PREDlCT--Probabilistic estimation of digital circuit testability," inProc. FTCS-15, Ann Arbor, MI, June 1985, pp. 220-225.
[13] L. Stockmeyer, "On approximation algorithms for #P,"SIAM J. Comput., vol. 14, pp. 849-861, 1985.
[14] T. W. Williams and K. P. Parker, "Design for testability-A survey,"IEEE Trans. Comput., vol. C-31, pp. 2-15, 1982.

Index Terms:
signal probabilities estimation; random satisfiability; Monte Carlo techniques; first-order effects; fault location; logic design; logic testing; Monte Carlo methods.
Citation:
B. Krishnamurthy, I.G. Tollis, "Improved Techniques for Estimating Signal Probabilities," IEEE Transactions on Computers, vol. 38, no. 7, pp. 1041-1045, July 1989, doi:10.1109/12.30854
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