Issue No.04 - April (1989 vol.38)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.21150
A description is given of the design and analysis of three types of multivalued PLAs (programmable logic arrays). Type 1 PLAs realize functions directly in the form of the max of min of literal functions and constants. In Type 2 PLAs, the body of the PLA is binary and the output is encoded as a multiple-valued logic value. Type 3 PLAs are the same as type 2 PLAs except for the use of 2-bit deco
optimal design; multiple-valued PLAs; programmable logic arrays; literal functions; 2-bit decoders; permutation network; logic arrays; logic design; many-valued logics.
T. Sasao, "On the Optimal Design of Multiple-Valued PLAs", IEEE Transactions on Computers, vol.38, no. 4, pp. 582-592, April 1989, doi:10.1109/12.21150