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A Systolic Architecture for Fast Dense Matrix Inversion
March 1989 (vol. 38 no. 3)
pp. 449-455
An array that inverts an n*n dense matrix in 5n-1 time units, including I/O time, is presented. The inversion algorithm consists of three phases and assumes that Gaussian elimination without pivoting can be applied. The array, which consists of 2n/sup 2/-n simple processing elements, implements and overlaps the execution of all three phases without any need for intermediate I/O or reconfigurati

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Index Terms:
VLSI algorithms; systolic architecture; fast dense matrix inversion; Gaussian elimination; data-steering technique; feedback recurrences; cellular arrays; computerised signal processing; VLSI.
A. El-Amawy, "A Systolic Architecture for Fast Dense Matrix Inversion," IEEE Transactions on Computers, vol. 38, no. 3, pp. 449-455, March 1989, doi:10.1109/12.21131
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