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| A. El-Amawy, "A Systolic Architecture for Fast Dense Matrix Inversion," IEEE Transactions on Computers, vol. 38, no. 3, pp. 449-455, March, 1989. | |||
| BibTex | x | ||
| @article{ 10.1109/12.21131, author = {A. El-Amawy}, title = {A Systolic Architecture for Fast Dense Matrix Inversion}, journal ={IEEE Transactions on Computers}, volume = {38}, number = {3}, issn = {0018-9340}, year = {1989}, pages = {449-455}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.21131}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - A Systolic Architecture for Fast Dense Matrix Inversion IS - 3 SN - 0018-9340 SP449 EP455 EPD - 449-455 A1 - A. El-Amawy, PY - 1989 KW - VLSI algorithms; systolic architecture; fast dense matrix inversion; Gaussian elimination; data-steering technique; feedback recurrences; cellular arrays; computerised signal processing; VLSI. VL - 38 JA - IEEE Transactions on Computers ER - | |||
[1] H. T. Kung, "Let's design algorithms for VLSI systems," inProc. Caltech Conf. VLSI, Jan. 1979.
[2] C. Seitz, "Concurrent VLSI architectures,"IEEE Trans. Comput., vol. C-33, pp. 1247-1265, 1984.
[3] S.Y. Kung, "VLSI Array Processors,"IEEE ASSP Magazine, Vol. 2, No. 3, July 1985, pp. 4-22.
[4] H. T. Kung, "Why systolic architectures?,"IEEE Computer, vol. 15, pp. 37-46, Jan. 1982.
[5] S. Y. Kung, "On supercomputing with systolic/wavefront array processors,"Proc. IEEE, vol. 72, pp. 867-884, 1984.
[6] S. Y. Kung, K. S. Arun, R. J. Gal-Ezar, and D. V. Bhaskar Rao, "Wavefront array processor: Language, architecture and applications,"IEEE Trans. Comput., vol. C-31, pp. 1054-1066, Nov. 1982.
[7] H. T. Kung and C. E. Leiserson, "Systolic arrays (for VLSI)," inSparse Matrix Proc. 1978, SIAM, 1979, pp. 256-282.
[8] G-J. Li and B. Wah, "The design of optimal systolic arrays,"IEEE Trans. Comput., vol. C-34, pp. 66-77, Jan. 1985.
[9] S. K. Rao, "Regular iterative algorithms and their implementations on processor arrays," Ph.D. dissertation, Stanford Univ., Stanford, CA, Oct. 1985.
[10] W. M. Gentleman and H. T. Kung, "On stable parallel linear system solvers," inProc. SPIE (Real Time Signal Processing IV), 1981, pp. 19-26.
[11] P. Quinton, "Automatic synthesis of systolic arrays from uniform recurrent equations," inProc. 11th Annu. Symp. Comput. Architecture, 1984, pp. 208-214.
[12] A. El-Amawy, "A systolic architecture for optimal filter design support,"Circuits, Systems and Signal Processing(Special Issue on Array Computing), no. 2, pp. 142-172, 1988.

