This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
An Interpolating Memory Unit for Function Evaluation: Analysis and Design
March 1989 (vol. 38 no. 3)
pp. 377-384
A technique for the evaluation of a general continuous function f(x) is presented, and the design of an interpolating memory as an implementation of the technique is described. The technique partitions the domain of f(x) into segments and defines an interpolating (or approximating) function for each. The implementation is a memory subsystem that holds the parameters of the approximating functio

[1] J. N. Mitchell, Jr., "Computer multiplication and division using binary logarithms,"IRE Trans. Electron. Comput., vol. EC-11, pp. 512-517, Aug. 1962.
[2] M. Combet, H. Van Zonneveld, and L. Verbeeck, "Computation of the base two logarithm of binary numbers,"IEEE Trans. Electron. Comput., vol. EC-14, pp. 863-867, Dec. 1965.
[3] E. L. Hall, D. D. Lynch, and S. J. Dwyer, III, "Generation of products and quotients using approximate binary logarithms for digital filtering applications,"IEEE Trans. Comput., vol. C-19, pp. 97-105, Feb. 1970.
[4] D. Marino, "New algorithms for the approximate evaluation in hard-ware of binary logarithms and elementary functions,"IEEE Trans. Comput., vol. C-21, pp. 1416-1421, Dec. 1972.
[5] T. A. Brubaker and J. C. Becker, "Multiplication using logarithms implemented with read-only memory,"IEEE Trans. Comput., vol. C-24, pp. 761-765, Aug. 1975.
[6] E. E. Swartzlander, Jr. and A. G. Alexopoulos, "The sign/logarithm number system,"IEEE Trans. Comput., vol. C-24, pp. 1238-1242, Dec. 1975.
[7] S. C. Lee and A. D. Edgar, "The Focus number system,"IEEE Trans. Comput., vol. C-26, pp. 1167-1170, Nov. 1977.
[8] A. D. Edgar and S. C. Lee, "FOCUS microcomputer number system,"Commun. ACM, vol. 22, pp. 166-177, Mar. 1979.
[9] H.-Y. Lo and Y. Aoki, "Generation of a precise binary logarithm with difference grouping programmable logic array,"IEEE Trans. Comput., vol. C-34, pp. 681-691, Aug. 1985.
[10] H.-Y. Lo, J. H. Lu, and Y. Aoki, "Programmable variable-rate up/down counter for generating binary logarithms,"Proc. IEE, vol. 131, pt. E, pp. 125-131, July 1984.
[11] Lo and Chen, "A hardwired generalized algorithm for generating the logarithm base-kby iteration,"IEEE Trans. Comput., vol. C-36, pp. 1363-1367, Nov. 1987.
[12] F. B. Hildebrand,Introduction to Numerical Analysis. New York: McGraw-Hill, 1956, ch. 2.
[13] S. Waser, "High-speed monolithic multipliers for real-time digital signal processing,"IEEE Computer., vol. 11, pp. 19-29, Oct. 1978.
[14] N. Takagi, H. Yasuura, and S. Yajima, "High-speed VLSI multiplication algorithm with a redundant binary addition tree,"IEEE Trans. Comput., vol. C-34, no. 9, pp. 789-796, Sept. 1985.

Index Terms:
polynomial interpolating functions; interpolating memory unit; function evaluation; general continuous function; memory subsystem; approximating functions; computational logic; approximation theory; digital arithmetic; interpolation; table lookup.
Citation:
A.S. Noetzel, "An Interpolating Memory Unit for Function Evaluation: Analysis and Design," IEEE Transactions on Computers, vol. 38, no. 3, pp. 377-384, March 1989, doi:10.1109/12.21124
Usage of this product signifies your acceptance of the Terms of Use.