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Synthesizing Linear Array Algorithms from Nested FOR Loop Algorithms
December 1988 (vol. 37 no. 12)
pp. 1578-1598
The mapping of algorithms structured as depth-p nested FOR loops into special-purpose systolic VLSI linear arrays is addressed. The mappings are done by using linear functions to transform the original sequential algorithms into a form suitable for parallel execution on linear arrays. A feasible mapping is derived by identifying formal criteria to be satisfied by both the original sequential al

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Index Terms:
linear array algorithms; nested FOR loop algorithms; systolic VLSI linear arrays; mappings; parallel execution; parallel algorithms.
Citation:
Lee Peizong, Z.M. Kedem, "Synthesizing Linear Array Algorithms from Nested FOR Loop Algorithms," IEEE Transactions on Computers, vol. 37, no. 12, pp. 1578-1598, Dec. 1988, doi:10.1109/12.9735
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