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IEEE Transactions on Computers
October 1988 (vol. 37 no. 10)
ISSN: 0018-9340
Table of Contents
Editor's Notice
Editor's Notice
(Abstract)
M.T. Liu
pp. 1165
ABSTRACT
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Maximum Alignment of Interchangeable Terminals
(Abstract)
L.-S. Lin
S. Sahni
pp. 1166-1177
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NC Algorithms for Recognizing Chordal Graphs and k Trees
(Abstract)
N. Chandrasekharan
S.S. Iyengar
pp. 1178-1183
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Bounding the Maximum Size of a Packet Radio Network
(Abstract)
C.G. Prohazka
pp. 1184-1190
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Dynamic Fault Reconfiguration in a Mesh-Connected MIMD Environment
(Abstract)
M.U. Uyar
A.P. Reeves
pp. 1191-1205
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Totally Self-Checking Checkers with Separate Internal Fault Indication
(Abstract)
N. Gaitanis
pp. 1206-1213
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The Cambridge Fast Ring Networking System
(Abstract)
A. Hopper
R.M. Needham
pp. 1214-1223
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Analytic Models of Cyclic Service Systems and their Application to Token-Passing Local Networks
(Abstract)
V. Rego
L.M. Ni
pp. 1224-1234
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TRAM: A Design Methodology for High-Performance, Easily Testable, Multimegabit RAMs
(Abstract)
N.T. Jarwala
D.K. Pradhan
pp. 1235-1250
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Combining Queueing Networks and Generalized Stochastic Petri Nets for the Solution of Complex Models of System Behavior
(Abstract)
G. Balbo
S.C. Bruell
S. Ghanta
pp. 1251-1268
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CORRESPONDENCE
Performance Evaluation of Nonrectangular Multistage Interconnection Networks
(Abstract)
V.S. Cherkassky
pp. 1269-1272
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On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays
(Abstract)
H.M. Shao
I.S. Reed
pp. 1273-1280
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Design of Self-Checking Sequential Machines
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S. Dhawan
R.C. De Vries
pp. 1280-1284
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Minimal Mesh Embeddings in Binary Hypercubes
(Abstract)
D.S. Scott
J. Brandenburg
pp. 1284-1285
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On Embedding Rectangular Grids in Hypercubes
(Abstract)
M.Y. Chan
F.Y.L. Chin
pp. 1285-1288
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A Functional Testing Method for Microprocessors
(Abstract)
L. Shen
S.Y.H. Su
pp. 1288-1293
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Modular Decomposition of Combinatorial Multiple-Values Circuits
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K.-Y. Fang
A.S. Wojcik
pp. 1293-1301
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Linear Feedback Shift Register Design Using Cyclic Codes
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L.-T. Wang
E.J. McCluskey
pp. 1302-1306
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On Multidimensional Arrays of Processors
(Abstract)
M.J. Atallah
pp. 1306-1309
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Timing Analysis Using Functional Analysis
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D. Brand
V.S. Iyengar
pp. 1309-1314
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On Subsequences of Arithmetic Sequences
(Abstract)
D.M. Mandelbaum
pp. 1314-1315
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Modified-Mesh Connected Parallel Computers
(Abstract)
D.A. Carlson
pp. 1315-1321
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