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T.J. Brosnan, N.R. Strader, II, "Modular Error Detection for BitSerial Multiplication," IEEE Transactions on Computers, vol. 37, no. 9, pp. 10431052, September, 1988.  
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@article{ 10.1109/12.2255, author = {T.J. Brosnan and N.R. Strader, II}, title = {Modular Error Detection for BitSerial Multiplication}, journal ={IEEE Transactions on Computers}, volume = {37}, number = {9}, issn = {00189340}, year = {1988}, pages = {10431052}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.2255}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Modular Error Detection for BitSerial Multiplication IS  9 SN  00189340 SP1043 EP1052 EPD  10431052 A1  T.J. Brosnan, A1  N.R. Strader, II, PY  1988 KW  bitserial multiplication; VLSI circuits; serialparallel; multiplier elements; signal processing arrays; arithmetic codes; residue; error detection; computer simulation; error detection codes; multiplying circuits; VLSI. VL  37 JA  IEEE Transactions on Computers ER   
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