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Integer Multiplication and Division on the HP Precision Architecture
August 1988 (vol. 37 no. 8)
pp. 980-990
In recent years, many architectural design efforts have focused on maximizing performance for frequently executed, simple instructions. The authors describe how a small set of primitive instructions combined with what is considered careful frequency analysis and clever programming allows the Hewlett-Packard (HP) Precision Architecture integer multiplication and division implementation to provid

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Index Terms:
integer division; HP Precision Architecture; frequency analysis; programming; Hewlett-Packard; integer multiplication; performance; computer architecture; digital arithmetic; Hewlett Packard computers.
Citation:
D.J. Magenheimer, L. Peters, K.W. Pettis, D. Zuras, "Integer Multiplication and Division on the HP Precision Architecture," IEEE Transactions on Computers, vol. 37, no. 8, pp. 980-990, Aug. 1988, doi:10.1109/12.2248
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