Issue No.07 - July (1988 vol.37)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.2232
The logarithmic number (LNS), which supports high-speed, high-precision arithmetic, is envisioned as a possible arithmetic coprocessor attachment to a floating-point (FLP) processor. An error analysis of an FLP-to-LNS encoder is presented. Analytic expressions for the probability density function of the encoding error are derived for a number of cases, according to the memory word lengths used
floating point processor; simulation; logarithmic encoder; logarithmic number; arithmetic coprocessor attachment; error analysis; probability density function; digital arithmetic; digital filters; encoding; error analysis.
T. Stouraitis, "Floating-Point to Logarithmic Encoder Error Analysis", IEEE Transactions on Computers, vol.37, no. 7, pp. 858-863, July 1988, doi:10.1109/12.2232