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Floating-Point to Logarithmic Encoder Error Analysis
July 1988 (vol. 37 no. 7)
pp. 858-863
The logarithmic number (LNS), which supports high-speed, high-precision arithmetic, is envisioned as a possible arithmetic coprocessor attachment to a floating-point (FLP) processor. An error analysis of an FLP-to-LNS encoder is presented. Analytic expressions for the probability density function of the encoding error are derived for a number of cases, according to the memory word lengths used

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Index Terms:
floating point processor; simulation; logarithmic encoder; logarithmic number; arithmetic coprocessor attachment; error analysis; probability density function; digital arithmetic; digital filters; encoding; error analysis.
Citation:
T. Stouraitis, F.J. Taylor, "Floating-Point to Logarithmic Encoder Error Analysis," IEEE Transactions on Computers, vol. 37, no. 7, pp. 858-863, July 1988, doi:10.1109/12.2232
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