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Fault Tolerance Capabilities in Multistage Network-Based Multicomputer Systems
July 1988 (vol. 37 no. 7)
pp. 788-798
The inherent fault tolerances of systems based on nonredundant multistage interconnection networks (MINs) is investigated. Graph models are used to describe the system, indicate faults, study their effects, and aid in mathematical formulation of these effects. Methodical terminology for defining functionality of two-sided-MIN-based multicomputer systems and specifying their fault tolerance of s

[1] G.J. Lipovski and M. Malek,Parallel Computing: Theory and Comparisons, John Wiley&Sons, New York, 1987.
[2] H. J. Siegel,Interconnection Networks for Large-Scale Parallel Processing: Theory and Case Studies. Lexington, MA: Lexington Books, 1985.
[3] C. L. Wu and T. Y. Feng, "On a class of multistage interconnection networks,"IEEE Trans. Comput., vol. C-30, pp. 696-702, 1980.
[4] L. R. Goke and G. J. Lipovski, "Banyan networks for partitioning multiprocessor systems," inProc. 1st Annu. Symp. Comput. Architecture, Dec. 1973, pp. 21-28.
[5] U. V. Premkumar, "A theoretical basis for the analysis and partitioning of regular SW-banyans," Ph.D. dissertation, Univ. Texas, Austin, 1981.
[6] T. Y. Feng and C. L. Wu, "Fault diagnosis for a class of multistage interconnection networks,"IEEE Trans. Comput., vol. C-30, pp. 743-758, Oct. 1981.
[7] K. M. Falavarjani and D. K. Pradhan, "Fault diagnosis of parallel processor interconnection networks," inDig. Papers, 11th Int. Symp. Fault-Tolerant Comput., June 1981, pp. 209-211.
[8] T. Y. Feng and L. P. Kao, "On fault diagnosis of some multistage networks," inProc. Int. Conf. Parallel Processing, Aug. 1982, pp. 99-101.
[9] M. Malek and E. Opper, "Multiple fault diagnosis for SW-banyan networks," inDig. Papers, 13th Int. Symp. Fault-Tolerant Comput., June 1983, pp. 446-449.
[10] S. Thanawastien and V. P. Nelson, "Optimal fault detection test sequences for shuffle/exchange network," inDig. Papers, 13th Int. Symp. Fault-Tolerant Comput., June 1983, pp. 442-445.
[11] S. Thanawastien and V. P. Nelson, "Distributed path testing in shuffle/exchange network based on write/verify approach," inProc. 1983 Real-Time Syst. Symp., Dec. 1983, pp. 131-140.
[12] G. B. Adams and H. J. Siegel, "The extra stage cube: A fault-tolerant interconnection network for super systems,"IEEE Trans. Comput., vol. C-31, pp. 443-453, 1982.
[13] K. Padmanabhan and D. H. Lawrie, "A class of redundant path multistage interconnection networks,"IEEE Trans. Comput., vol. C- 32, pp. 1099-1108, Dec. 1983.
[14] V. Cherkassky, E. Opper, and M. Malek, "Reliability and fault diagnosis analysis of fault-tolerant multistage interconnection networks," inDig. Papers, 14th Int. Symp. Fault-Tolerant Comput., June 1984, pp. 246-251.
[15] U. V. Premkumar, R. Kapur, M. Malek, G. J. Lipovski, and P. Horne, "Design and implementation of the banyan interconnection in TRAC," inAFIPS Conf. Proc., vol. 49, 1980, pp. 643-653.

Index Terms:
graph models; methodical terminology; multistage network-based multicomputer systems; fault tolerances; single faulty vertex; single faulty edge; banyan network; Texas reconfigurable array computer; fault tolerant computing; graph theory; multiprocessor interconnection networks.
Citation:
I. Gazit, M. Malek, "Fault Tolerance Capabilities in Multistage Network-Based Multicomputer Systems," IEEE Transactions on Computers, vol. 37, no. 7, pp. 788-798, July 1988, doi:10.1109/12.2224
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