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Analysis and Design of Nonequivalent Multistage Interconnection Networks
February 1988 (vol. 37 no. 2)
pp. 232-237
Nonequivalence of multistage interconnection networks is established by obtaining a reduced graph model and then partitioning it into several bipartite subgraphs. This is shown to transform nonequivalence to nonisomorphism, which can be easily determined by examining the intrinsic characteristics of undirected loops. A reverse process allows the design of nonequivalent networks.

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Index Terms:
nonequivalent multistage interconnection networks; reduced graph model; bipartite subgraphs; nonisomorphism; equivalence classes; graph theory; multiprocessor interconnection networks.
Citation:
D.P. Agrawal, S.-C. Kim, N.K. Swain, "Analysis and Design of Nonequivalent Multistage Interconnection Networks," IEEE Transactions on Computers, vol. 37, no. 2, pp. 232-237, Feb. 1988, doi:10.1109/12.2154
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