Issue No.10 - October (1987 vol.36)
K.M. Nichols , AT&T Bell Laboratories
Special-purpose networks of processors and intelligent switching devices can be programmed to solve problems with inherent parallelism. The target algorithm is coded into a number of asynchronously executing parallel tasks, and assigned to specific processors. For well-known algorithms, information about the data communicated between these tasks (traffic) can be characterized and used by a heuristic algorithm to produce a specialized interconnection network of switching devices at a lower cost and increased performance over the use of a general purpose structure. A program was developed which uses intertask communications to automatically generate interconnection structures of switch chips (SC's). Simulation results were used to compare cost/performance measures for the program-generated networks with some well-known structures, using both statistically generated traffic patterns and the simulation of real applications.
parallel processing, Algorithm-specific architectures, heuristic topology generation, interconnection network architectures, multi- computers, multiprocessors
K.M. Nichols, D.G. Messerschmitt, "Traffic-Specific Interconnection Networks for Multicomputers", IEEE Transactions on Computers, vol.36, no. 10, pp. 1183-1196, October 1987, doi:10.1109/TC.1987.1676859