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A Multiprocessor Architecture for Two-Dimensional Digital Filters
July 1987 (vol. 36 no. 7)
pp. 876-884
J.H. Kim, Department of Electrical Engineering, North Carolina A&T State University
In this paper, a generic computational primitive is developed for the implementation of any arbitrary order one-dimensional or two-dimensional FIR or IIR digital filter. This computational primitive can form the basis for a single chip processor for one-dimensional and two-dimensional digital signal processing. A multiprocessor architecture for real-time implementation of spatial domain filters is developed with each processing unit in the network implementing the computational primitive. This multiprocessor system has a simple control scheme, a simple interconnection network, a very high efficiency, and low data transfers and storage requirements. Thus, it avoids the bottlenecks associated with traditional parallel computers and multiprocessor systems.
Index Terms:
two-dimensional filters, Digital signal processing chip, fast algorithm, image processing, multiprocessor system, parallel computer architecture
J.H. Kim, W.E. Alexander, "A Multiprocessor Architecture for Two-Dimensional Digital Filters," IEEE Transactions on Computers, vol. 36, no. 7, pp. 876-884, July 1987, doi:10.1109/TC.1987.1676982
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