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Processor Allocation for Horizontal and Vertical Parallelism and Related Speedup Bounds
April 1987 (vol. 36 no. 4)
pp. 410-420
C.D. Polychoronopoulos, Center for Supercomputing Research and Development, and with the Department of Electrical and Computer Engineering, the University of Illinois
The main aim of the paper is to study allocation of processors to, parallel programs executing on a multiprocessor system, and the resulting speedups. First, we consider a parallel program as a sequence of steps where each step consists of a set of parallel operations. General bounds on the speedup on a p- processor system are derived based on this model. Measurements of code parallelism for the, LINPACK numerical package are presented to support the belief that typical numerical programs contain much potential parallelism that can be discovered by a good restructuring compiler. Next, a parallel program is represented as a task graph whose nodes are do across loops (i.e., loops whose iterations can be partially, overlapped). It is shown how processors can be allocated to exploit horizontal and vertical parallelism in such graphs. Two processor allocation heuristic algorithms (WP and PA) are presented. PA is the heart of the WP and is used to obtain efficient processor allocations for a set of independent parallel tasks. WP allocates processors to general task graphs. Finally, a general formula for the speedup of a DO across loop is given that is more accurate than the known formula.
Index Terms:
vector machines, DO all and DO across loops, multiprocessors, parallel Fortran programs, program graphs, program speedup, speedup bounds
Citation:
C.D. Polychoronopoulos, U. Banerjee, "Processor Allocation for Horizontal and Vertical Parallelism and Related Speedup Bounds," IEEE Transactions on Computers, vol. 36, no. 4, pp. 410-420, April 1987, doi:10.1109/TC.1987.1676923
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