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Inverter-Minimum Networks
February 1987 (vol. 36 no. 2)
pp. 226-230
| ASCII Text | x | ||
| K. Nakamura, "Inverter-Minimum Networks," IEEE Transactions on Computers, vol. 36, no. 2, pp. 226-230, February, 1987. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1987.1676885, author = {K. Nakamura}, title = {Inverter-Minimum Networks}, journal ={IEEE Transactions on Computers}, volume = {36}, number = {2}, issn = {0018-9340}, year = {1987}, pages = {226-230}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1987.1676885}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Inverter-Minimum Networks IS - 2 SN - 0018-9340 SP226 EP230 EPD - 226-230 A1 - K. Nakamura, PY - 1987 KW - positive function KW - Inversion complexity KW - maximum inversions KW - minimum inverters KW - negative function KW - negative gate VL - 36 JA - IEEE Transactions on Computers ER - | |||
Let Fm = (f1 ,...,fm ) be a vector of m logical functions. Let Inv (Fm), the inversion complexity of Fm, be the minimum number of inverters required to realize Fm by a feed-forward network using AND gates, OR gates, and inverters.
Index Terms:
positive function, Inversion complexity, maximum inversions, minimum inverters, negative function, negative gate
Citation:
K. Nakamura, "Inverter-Minimum Networks," IEEE Transactions on Computers, vol. 36, no. 2, pp. 226-230, Feb. 1987, doi:10.1109/TC.1987.1676885
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