A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation

B.P. Sinha; P.K. Srimani; B.B. Bhattacharya; S. Ghose

doi:10.1109/TC.1986.1676702

Publication
1986
Issue No. 11 - November
Abstract - A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation

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A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation

November 1986 (vol. 35 no. 11)

pp. 1000-1004

	ASCII Text	x
	B.P. Sinha, B.B. Bhattacharya, S. Ghose, P.K. Srimani, "A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation," IEEE Transactions on Computers, vol. 35, no. 11, pp. 1000-1004, November, 1986.

	BibTex	x
	@article{ 10.1109/TC.1986.1676702, author = {B.P. Sinha and B.B. Bhattacharya and S. Ghose and P.K. Srimani}, title = {A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation}, journal ={IEEE Transactions on Computers}, volume = {35}, number = {11}, issn = {0018-9340}, year = {1986}, pages = {1000-1004}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1986.1676702}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - JOUR JO - IEEE Transactions on Computers TI - A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation IS - 11 SN - 0018-9340 SP1000 EP1004 EPD - 1000-1004 A1 - B.P. Sinha, A1 - B.B. Bhattacharya, A1 - S. Ghose, A1 - P.K. Srimani, PY - 1986 KW - VLSI architecture KW - Diameter KW - parallel algorithms KW - pipelining KW - shortest paths VL - 35 JA - IEEE Transactions on Computers ER -

B.P. Sinha, Electronics Unit, Indian Statistical Institute

B.B. Bhattacharya

S. Ghose

P.K. Srimani

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.1986.1676702

In this correspondence we develop a parallel algorithm to compute the all-pairs shortest paths and the diameter of a given graph. Next, this algorithm is mapped into a suitable VLSI systolic architecture and the performance of this proposed VLSI implementation is evaluated.

Index Terms:

VLSI architecture, Diameter, parallel algorithms, pipelining, shortest paths

Citation:

B.P. Sinha, B.B. Bhattacharya, S. Ghose, P.K. Srimani, "A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation," IEEE Transactions on Computers, vol. 35, no. 11, pp. 1000-1004, Nov. 1986, doi:10.1109/TC.1986.1676702

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