Issue No.11 - November (1986 vol.35)
P.J. Varman , Department of Electrical and Computer Engineering, Rice University
Synthesis of a family of matrix multiplication algorithms on a linear array is described. All these algorithms are optimal in their area and time requirements. An important feature of the family of algorithms is that they are modularly extensible, that is, larger problem sizes can be handled by cascading smaller arrays consisting of processors having a fixed amount of local storage. These algorithms exhibit a tradeoff between the number of processors required and the local storage within a processor. In particular, as the local storage increases the number of processors required to multiply the two matrices decrease.
VLSI, Array Processors, extensible algorithms, linear array, matrix multiplication, parallel processing, processor-memory tradeoff
P.J. Varman, I.V. Ramakrishnan, "Synthesis of an Optimal Family of Matrix Multiplication Algorithms on Linear Arrays", IEEE Transactions on Computers, vol.35, no. 11, pp. 989-996, November 1986, doi:10.1109/TC.1986.1676700