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Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor
October 1986 (vol. 35 no. 10)
pp. 910-916
null Woei Lin, Department of Electrical Engineering, Pennsylvania State University
This correspondence presents a collection of reconfiguration procedures for a multiprocessor which employs multistage interconnection networks. These procedures are used to dynamically partitipn the multiprocessor into many subsystems, and reconfigure them to form a variety commonly used topologies to match task graphs. By examining the switching capability of the interconnection network, design rules for avoiding connection conflicts are exploited. Then, on the basis of these rules, parallel procedures are designed. With the procedures, a subsystem can be reconfigured in the form of the desired topologies without interfering with other subsystems. In addition, the reconfiguration of a subsystem can be accomplished in constant time, independently of subsystem size.
Index Terms:
connection conflicts, Parallel processing, reconfigurable multiprocessors, multiprocessing, interconnection networks, mapping problems, circuit switching
Citation:
null Woei Lin, null Chuan-Lin Wu, "Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor," IEEE Transactions on Computers, vol. 35, no. 10, pp. 910-916, Oct. 1986, doi:10.1109/TC.1986.1676683
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