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September 1986 (vol. 35 no. 9)
pp. 781-789
| ASCII Text | x | ||
| I.S. Reed, T.K. Truong, J.M. Jensen, null In-Shek Hsu, "The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes," IEEE Transactions on Computers, vol. 35, no. 9, pp. 781-789, September, 1986. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1986.1676838, author = {I.S. Reed and T.K. Truong and J.M. Jensen and null In-Shek Hsu}, title = {The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes}, journal ={IEEE Transactions on Computers}, volume = {35}, number = {9}, issn = {0018-9340}, year = {1986}, pages = {781-789}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1986.1676838}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes IS - 9 SN - 0018-9340 SP781 EP789 EPD - 781-789 A1 - I.S. Reed, A1 - T.K. Truong, A1 - J.M. Jensen, A1 - null In-Shek Hsu, PY - 1986 KW - Wyner-Ash code KW - Convolutional code KW - error-trellis syndrome decoder KW - VLSI VL - 35 JA - IEEE Transactions on Computers ER - | |||
In this paper a recursive algorithm using the error-trellis decoding technique is developed to decode certain convolutional codes (CC's). An example, illustrating the VLSI architecture of such a decoder, is given for a dual-k CC. It is demonstrated that such a decoder can be realized readily on a single chip with NMOS technology.
Index Terms:
Wyner-Ash code, Convolutional code, error-trellis syndrome decoder, VLSI
Citation:
I.S. Reed, T.K. Truong, J.M. Jensen, null In-Shek Hsu, "The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes," IEEE Transactions on Computers, vol. 35, no. 9, pp. 781-789, Sept. 1986, doi:10.1109/TC.1986.1676838
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