Issue No.07 - July (1986 vol.35)
pp: 602-612
J.P. Hayes , Department of Electrical Engineering and Computer Science, University of Michigan
A new class of switch-level logic circuits intended for modeling digital MOS VLSI circuits is presented. These circuits, which are called pseudo-Boolean, are composed of a single (voltage) source, connectors, switches, attenuators, and wells. The latter two devices are digital versions of resistors and capacitors, respectively, and may assume an arbitrary but finite number of different sizes. Signals are bidirectional, and are assigned a finite set of values of the form (v, s) where v corresponds to voltage level and s corresponds to electrical current or charge level (logical strength). It is shown that these signal values and the associated logical operations form a generalization of Boolean algebra called pseudo-Boolean or Heyting algebra. The analysis of pseudo- Boolean circuits using discrete counterparts of Kirchoff's current law and the superposition principle is discussed, as well as the application of pseudo-Boolean techniques to digital simulation.
VLSI design, Digital simulation, logic design, MOS circuits, pseudo-Boolean algebra, switch-level simulation, switching theory
J.P. Hayes, "Pseudo-Boolean Logic Circuits", IEEE Transactions on Computers, vol.35, no. 7, pp. 602-612, July 1986, doi:10.1109/TC.1986.1676801