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An Alternative to Scan Design Methods for Sequential Machines
April 1986 (vol. 35 no. 4)
pp. 384-388
K.K. Saluja, Department of Electrical and Computer Engineering, University of Wisconsin
The problem of testing sequential machines using a checking experiment is investigated. An algorithm is given to augment sequential machines by adding extra input(s) to make them testable. We also present a circuit modification method, similar to scan methods, such that the augmented machine can be tested by the checking experiment. A justification of our method for a VLSI environment is given by determining the overheads.
Index Terms:
testable design, Built-in self test, checking experiments, scan design, sequential machines
Citation:
K.K. Saluja, R. Dandapani, "An Alternative to Scan Design Methods for Sequential Machines," IEEE Transactions on Computers, vol. 35, no. 4, pp. 384-388, April 1986, doi:10.1109/TC.1986.1676776
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