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(N, K) Concept Fault Tolerance
April 1986 (vol. 35 no. 4)
pp. 339-349
T. Krol, Philips Research Laboratories
This paper describes a new fault-tolerant computer architecture based on a "distributed implementation" of a symbol- error correcting code. In this, as at is called, (N, K) concept the faults are masked by this code. The (N, K) concept is described in detail for N = 4 and K = 2. It is shown that symbol-error correcting codes having additional bit-error correcting capabilities make additional memory protection by means of bit-error correcting codes superfluous and a newly designed symbol-and bit- error correcting code for the
Index Terms:
voting, Consistency, error-correcting codes, fault tolerance, hardware redundancy, masking
Citation:
T. Krol, T. Krol, "(N, K) Concept Fault Tolerance," IEEE Transactions on Computers, vol. 35, no. 4, pp. 339-349, April 1986, doi:10.1109/TC.1986.1676767
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