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Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits
February 1986 (vol. 35 no. 2)
pp. 157-161
J.L. Mangin, Advanced Micro Devices
The use of quaternary logic input and output signals for delivering information on and off chip could reduce the number of required package pins or increase the amount of information conveyed on a fixed number of package pins. In this correspondence, we discuss the performance of prototype CMOS binary-to-quaternary encoder and quaternary-to-binary decoder test circuits that have been realized on a gate array IC chip.
Index Terms:
VLSI chip interfaces, Four-valued signaling, quaternary logic encoders and decoders
Citation:
J.L. Mangin, K.W. Current, "Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits," IEEE Transactions on Computers, vol. 35, no. 2, pp. 157-161, Feb. 1986, doi:10.1109/TC.1986.1676733
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