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Comparator with Completion Signal
September 1985 (vol. 34 no. 9)
pp. 855-857
| ASCII Text | x | ||
| D. Lee, "Comparator with Completion Signal," IEEE Transactions on Computers, vol. 34, no. 9, pp. 855-857, September, 1985. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1985.1676642, author = {D. Lee}, title = {Comparator with Completion Signal}, journal ={IEEE Transactions on Computers}, volume = {34}, number = {9}, issn = {0018-9340}, year = {1985}, pages = {855-857}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1985.1676642}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Comparator with Completion Signal IS - 9 SN - 0018-9340 SP855 EP857 EPD - 855-857 A1 - D. Lee, PY - 1985 KW - tree circuit KW - Binary comparator KW - completion signal KW - delay KW - hazard VL - 34 JA - IEEE Transactions on Computers ER - | |||
This note provides a design of a binary comparator with completion signal. The average propagation delay is a constant, independent of n, the number of inputs, while the logic complexity is a linear function of n.
Index Terms:
tree circuit, Binary comparator, completion signal, delay, hazard
Citation:
D. Lee, "Comparator with Completion Signal," IEEE Transactions on Computers, vol. 34, no. 9, pp. 855-857, Sept. 1985, doi:10.1109/TC.1985.1676642
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