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Ensuring Fault Tolerance of Phase-Locked Clocks
August 1985 (vol. 34 no. 8)
pp. 752-756
C.M. Krishna, Department of Electrical and Computer Enginieering, University of Massachusetts
Processors within a real-time multiprocessor system must be synchronized with as little overhead as possible. Although synchronization can be achieved via both software (e.g., interactive convergence and interactive consistency algorithms) and hardware (e.g., multistage synchronizers and phase-locked clocks), phase-locked clocks are most attractive due to their small overheads.
Index Terms:
synchronization, Interactive consistency and interactive convergence algorithms, malicious failure, phase-locked clocks
Citation:
C.M. Krishna, K.G. Shin, R.W. Butler, "Ensuring Fault Tolerance of Phase-Locked Clocks," IEEE Transactions on Computers, vol. 34, no. 8, pp. 752-756, Aug. 1985, doi:10.1109/TC.1985.1676622
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