Issue No.08 - August (1985 vol.34)
null Hao-Yung Lo , Department of Electrical Engineering, National Tsing Hua University
The design algorithm of a differential group programmable logic array (DGPLA) to generate the precise binary logarithm function is suggested. It can reach an optimal condition such that the number of bits in a PLA is minimized, while the error is still kept as small as possible. Thus, the space in the PLA is saved, estimated at only 15.94 percent of the space for a readonly memory (ROM) counterpart.
ROM's, Arithmetic units error correction, binary antilogarithm generation, binary logarithm generation, differential group programmable logic arrays (DGPLA's), PLA's
null Hao-Yung Lo, Y. Aoki, "Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array", IEEE Transactions on Computers, vol.34, no. 8, pp. 681-691, August 1985, doi:10.1109/TC.1985.1676614