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CPAC?Concurrent Processor Architecture for Control
February 1985 (vol. 34 no. 2)
pp. 163-169
V.C. Jaswa, System Industries
We describe a computer architecture for implementing real-time controllers. The concurrent processor architecture for control (CPAC) is optimized for computing the state transitions of a controller. While general-purpose computers are optimized for data manipulation, CPAC is optimized for state manipulation since the states of a controller and the rules governing state transitions constitute a complete high-level description of a controller implementation. The CPAC architecture characterizes a controller in terms of the sets of continuous and discrete states of the system and-logically as well as physically separates the two sets. This dichotomy results in a simpler specification of the rules for state transitions.
Index Terms:
VLSI, Computer architecture, concurrent processing, controls, programmable control, real-time, real-time control
V.C. Jaswa, C.E. Thomas, J.T. Pedicone, "CPAC?Concurrent Processor Architecture for Control," IEEE Transactions on Computers, vol. 34, no. 2, pp. 163-169, Feb. 1985, doi:10.1109/TC.1985.1676553
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