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The VLSI Implementation of a Reed?Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm (PDF)
October 1984 (vol. 33 no. 10)
pp. 906-911
| ASCII Text | x | ||
| null In-Shek Hsu, I.S. Reed, T.K. Truong, null Ke Wang, null Chiunn-Shyong Yeh, L.J. Deutsch, "The VLSI Implementation of a Reed?Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm," IEEE Transactions on Computers, vol. 33, no. 10, pp. 906-911, October, 1984. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1984.1676351, author = {null In-Shek Hsu and I.S. Reed and T.K. Truong and null Ke Wang and null Chiunn-Shyong Yeh and L.J. Deutsch}, title = {The VLSI Implementation of a Reed?Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm}, journal ={IEEE Transactions on Computers}, volume = {33}, number = {10}, issn = {0018-9340}, year = {1984}, pages = {906-911}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1984.1676351}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - The VLSI Implementation of a Reed?Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm IS - 10 SN - 0018-9340 SP906 EP911 EPD - 906-911 A1 - null In-Shek Hsu, A1 - I.S. Reed, A1 - T.K. Truong, A1 - null Ke Wang, A1 - null Chiunn-Shyong Yeh, A1 - L.J. Deutsch, PY - 1984 KW - VLSI KW - Berlekamp's bit-serial multiplier KW - dual basis KW - Reed-Solomon code KW - trace VL - 33 JA - IEEE Transactions on Computers ER - | |||
Berlekamp has developed for the California Institute of Technology Jet Propulsion Laboratory (JPL) a bit-serial multiplication algorithm for the encoding of Reed-Solomon (RS) codes, using a dual basis over a Galois field. The conventional RS encoder for long codes often requires lookup tables to perform multiplication of two field elements. Berlekamp's algorithm requires only shifting and EXCLUSIVE OR operations. It is shown in this paper that the new dual-basis (255,223) RS encoder can be realized readily on a single VLSI chip with NMOS technology.
Index Terms:
VLSI, Berlekamp's bit-serial multiplier, dual basis, Reed-Solomon code, trace
Citation:
null In-Shek Hsu, I.S. Reed, T.K. Truong, null Ke Wang, null Chiunn-Shyong Yeh, L.J. Deutsch, "The VLSI Implementation of a Reed?Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm," IEEE Transactions on Computers, vol. 33, no. 10, pp. 906-911, Oct. 1984, doi:10.1109/TC.1984.1676351
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