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Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs
June 1984 (vol. 33 no. 6)
pp. 546-550
J.L.A. Hughes, Center for Reliable Computing, Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University
Two new general designs for totally self-checking (TSC) comparators with an arbitrary number of input vectors are presented. The multipattern comparator combines modified TSC 2-input comparators and a TSC two-rail checker that requires only four patterns for self-testing. The counter-driven comparator adds circuitry to generate an exhaustive set of test patterns. The designs are compared on the basis of input limitations, circuit complexity, and gate delays. It is shown that TSC comparators cannot exist under two sets of conditions associated with 1-bit input vectors and two-level circuit realizations.
Index Terms:
two-rail checker, Comparator, equality checker, permuter, totally self-checking
J.L.A. Hughes, E.J. McCluskey, D.J. Lu, "Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs," IEEE Transactions on Computers, vol. 33, no. 6, pp. 546-550, June 1984, doi:10.1109/TC.1984.1676478
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