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Area-Time Optimal Fast Implementation of Several Functions in a VLSI Model
May 1984 (vol. 33 no. 5)
pp. 455-462
K. Wada, Faculty of Engineering Science, Department of Information and Computer Sciences, Osaka University
Area and computation time are considered to be important measures with which VLSI circuits are evaluated. In this paper, the area-time complexity for nontrivial n-input m-output Boolean functions, such as a decoder and an encoder, is studied with a model similar to Brent-Kung's model. A lower bound on area-time-product (ATaaa.=1) for these functions is shown: for example, ATa= ?(2n
Index Terms:
VLSI model, Area efficient layout, area-time complexity, Boolean circuit complexity, priority encoder
Citation:
K. Wada, K. Hagihara, N. Tokura, "Area-Time Optimal Fast Implementation of Several Functions in a VLSI Model," IEEE Transactions on Computers, vol. 33, no. 5, pp. 455-462, May 1984, doi:10.1109/TC.1984.1676463
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