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A Faster 8-Bit Carry Circuit
December 1983 (vol. 32 no. 12)
pp. 1209-1211
R. Kallman, Department of Mathematical Sciences, Ball State University
A modification of the Chen-Kuck 8-bit carry circuit is presented with one less gate delay and a proof is given that this is the best possible time. The corresponding results for longer length circuits are summarized.
Index Terms:
time delays, Binary addition, combinational circuit synthesis, component counts, computer arithmetic, fast adders, parallel adders
Citation:
R. Kallman, "A Faster 8-Bit Carry Circuit," IEEE Transactions on Computers, vol. 32, no. 12, pp. 1209-1211, Dec. 1983, doi:10.1109/TC.1983.1676188
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