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The VLSI Complexity of Sorting
December 1983 (vol. 32 no. 12)
pp. 1171-1184
C.D. Thompson, Computer Science Division, University of California
The area-time complexity of sorting is analyzed under an updated model of VLSI computation. The new model makes a distinction between "processing" circuits and "memory" circuits; the latter are less important since they are denser and consume less power. Other adjustments to the model make it possible to compare pipelined and nonpipelined designs.
Index Terms:
VLSI sorter, Area-time complexity, bitonic sort, bubble sort, heapsort, mesh-connected computers, parallel algorithms, shuffle-exchange network, sorting, VLSI
Citation:
C.D. Thompson, "The VLSI Complexity of Sorting," IEEE Transactions on Computers, vol. 32, no. 12, pp. 1171-1184, Dec. 1983, doi:10.1109/TC.1983.1676178
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