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Fourier Transforms in VLSI
November 1983 (vol. 32 no. 11)
pp. 1047-1057
C.D. Thompson, Division of Computer Science, University of California
This paper surveys nine designs for VLSI circuits that compute N-element Fourier transforms. The largest of the designs requires O(N2 log N) units of silicon area; it can start a new Fourier transform every O(log N) time units. The smallest designs have about 1/Nth of this throughput, but they require only 1/Nth as much area.
Index Terms:
VLSI, Algorithms implemented in hardware, area-time complexity, computational complexity, FFT, Fourier transform, mesh-connected computers, parallel algorithms, shuffle-exchange network
Citation:
C.D. Thompson, "Fourier Transforms in VLSI," IEEE Transactions on Computers, vol. 32, no. 11, pp. 1047-1057, Nov. 1983, doi:10.1109/TC.1983.1676155
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