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An Easily Testable Design of Programmable Logic Arrays for Multiple Faults
November 1983 (vol. 32 no. 11)
pp. 1038-1046
K.K. Saluja, Department of Electrical and Computer Engineering, University of Newcastle
In this paper, the problem of fault detection for multiple faults in programmable logic arrays (PLA's) is discussed. An easily testable design of PLA's has been proposed which has the following properties: 1) for a PLA with n inputs, m product terms, there exists a test set such that the test patterns do not depend on the function realized by the PLA; 2) the number of tests to detect multiple stuck type and cross point faults is m(2n + 1) + 4n + 4; 3) the number of additional pins for the testable design is 3; 4) the design philosophy is compatible with the built-in-testing approaches.
Index Terms:
stuck-type faults, Cross-point faults, easily testable design, multiple faults, programmable logic arrays
Citation:
K.K. Saluja, K. Kinoshita, H. Fujiwara, "An Easily Testable Design of Programmable Logic Arrays for Multiple Faults," IEEE Transactions on Computers, vol. 32, no. 11, pp. 1038-1046, Nov. 1983, doi:10.1109/TC.1983.1676154
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