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Two VLSI Structures for the Discrete Fourier Transform
August 1983 (vol. 32 no. 8)
pp. 750-754
| ASCII Text | x | ||
| G. Bongiovanni, "Two VLSI Structures for the Discrete Fourier Transform," IEEE Transactions on Computers, vol. 32, no. 8, pp. 750-754, August, 1983. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1983.1676314, author = {G. Bongiovanni}, title = {Two VLSI Structures for the Discrete Fourier Transform}, journal ={IEEE Transactions on Computers}, volume = {32}, number = {8}, issn = {0018-9340}, year = {1983}, pages = {750-754}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1983.1676314}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Two VLSI Structures for the Discrete Fourier Transform IS - 8 SN - 0018-9340 SP750 EP754 EPD - 750-754 A1 - G. Bongiovanni, PY - 1983 KW - VLSI KW - Area-time complexity KW - computational complexity KW - data rate KW - Fourier transformation KW - pipeline structures KW - shuffle-exchange connections VL - 32 JA - IEEE Transactions on Computers ER - | |||
Two VLSI structures for the computation of the discrete Fourier transform are presented. The first structure is a pipeline working concurrently on different transforms. It is shown that it matches, within a constant factor, the theoretical lower bounds for area versus data rate. The second structure is a simple modification of the first one; it works on a single transform at a time, and it matches within a constant factor the theoretical area-time lower bounds.
Index Terms:
VLSI, Area-time complexity, computational complexity, data rate, Fourier transformation, pipeline structures, shuffle-exchange connections
Citation:
G. Bongiovanni, "Two VLSI Structures for the Discrete Fourier Transform," IEEE Transactions on Computers, vol. 32, no. 8, pp. 750-754, Aug. 1983, doi:10.1109/TC.1983.1676314
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