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Reduction of Connections for Multibus Organization
August 1983 (vol. 32 no. 8)
pp. 707-716
| ASCII Text | x | ||
| T. Lang, M. Valero, M.A. Fiol, "Reduction of Connections for Multibus Organization," IEEE Transactions on Computers, vol. 32, no. 8, pp. 707-716, August, 1983. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1983.1676308, author = {T. Lang and M. Valero and M.A. Fiol}, title = {Reduction of Connections for Multibus Organization}, journal ={IEEE Transactions on Computers}, volume = {32}, number = {8}, issn = {0018-9340}, year = {1983}, pages = {707-716}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1983.1676308}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Reduction of Connections for Multibus Organization IS - 8 SN - 0018-9340 SP707 EP716 EPD - 707-716 A1 - T. Lang, A1 - M. Valero, A1 - M.A. Fiol, PY - 1983 KW - multiprocessors KW - Arbitration KW - connection reduction KW - interconnection network KW - multiple buses VL - 32 JA - IEEE Transactions on Computers ER - | |||
The multibus interconnection network is an attractive solution for connecting processors and memory modules in a multiprocessor with shared memory. It provides a throughput which is intermediate between the single bus and the crossbar, with a corresponding intermediate cost.
Index Terms:
multiprocessors, Arbitration, connection reduction, interconnection network, multiple buses
Citation:
T. Lang, M. Valero, M.A. Fiol, "Reduction of Connections for Multibus Organization," IEEE Transactions on Computers, vol. 32, no. 8, pp. 707-716, Aug. 1983, doi:10.1109/TC.1983.1676308
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