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Issue No.05 - May (1983 vol.32)
pp: 464-475
K.V.S.S. Prasad Rao , Digital Processors Laboratory, Electronics Systems Division, Vikram Sarabhai Space Centre
All the totally self checking (TSC) circuits known so far [3]-[8] restrict their fault sets to either single or multiple but unidirectional stuck-at faults. Meyer and Sundstrom [20] have considered on line diagnosis of unrestricted faults but the class of circuits proposed by them does not fall under the category of TSC circuits. This paper proposes a new type of circuit model which is TSC for a fault set, consisting of all possible, i.e., unrestricted stuck-at faults on all the gate input and output signal lines. The model uses redundancy in both space and time domains and realizes combinatorial functions. Some important properties of the model are brought out by a set of lemmas and theorems. The viability of the model is demonstrated by a circuit example which uses CMOS technology.
time domain redundancy, CMOS, combinatorial logic, multiple faults, self-checking circuits, self-dual function, space domain redundancy
K.V.S.S. Prasad Rao, D. Basu, "Design of Totally Self-Checking Circuits with an Unrestricted Stuck-At Fault-Set Using Redundancy in Space and Time Domains", IEEE Transactions on Computers, vol.32, no. 5, pp. 464-475, May 1983, doi:10.1109/TC.1983.1676257
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