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Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing
February 1983 (vol. 32 no. 2)
pp. 190-194
Z. Barzilai, IBM T. J. Watson Research Center
One has a shift register of length n and a collection of designated subsets of {0, 1,???, n-1}. The problem is to devise a method for feeding a string of bits into the shift register in such an order that, for each designated subset S = {k1,???, kr}, if one keeps track of the bit patterns appearing at the corresponding positions k1, ???, krof the shift r
Index Terms:
VLSI self-testing, Linear feedback shift registers (LFSR), primitive polynomials
Citation:
Z. Barzilai, D. Coppersmith, A.L. Rosenberg, "Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing," IEEE Transactions on Computers, vol. 32, no. 2, pp. 190-194, Feb. 1983, doi:10.1109/TC.1983.1676202
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