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Comparative Performance Analysis of Single Bus Multiprocessor Architectures
December 1982 (vol. 31 no. 12)
pp. 1179-1191
M.A. Marsan, Istituto di Elettronica e Telecomunicazioni, Politecnico di Torino
Markovian models are developed for the performance analysis and comparison of several single bus multiprocessor architectures. Processors are assumed to cooperate in a message passing fashion, and messages are exchanged through common memory areas. Four architectures are considered in this paper which differ in the location of the common memory modules. Contention for shared resources is modeled and the corresponding efficiency loss is studied. Numerical results are obtained for the processing power of each architecture, introducing simplifying assumptions that allow a compact Markovian system description.
Index Terms:
performance evaluation, Bus contention, Markovian models, memory interference, message passing, multiprocessors, performance comparison
Citation:
M.A. Marsan, G. Balbo, G. Conte, "Comparative Performance Analysis of Single Bus Multiprocessor Architectures," IEEE Transactions on Computers, vol. 31, no. 12, pp. 1179-1191, Dec. 1982, doi:10.1109/TC.1982.1675942
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