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Wavefront Array Processor: Language, Architecture, and Applications
November 1982 (vol. 31 no. 11)
pp. 1054-1066
null Sun-Yuan Kung, Department of Electrical Engineering-Systems, University of Southern California
This paper describes the development of a wavefront-based language and architecture for a programmable special-purpose multiprocessor array. Based on the notion of computational wavefront, the hardware of the processor array is designed to provide a computing medium that preserves the key properties of the wavefront. In conjunction, a wavefront language (MDFL) is introduced that drastically reduces the complexity of the description of parallel algorithms and simulates the wavefront propagation across the computing network. Together, the hardware and the language lead to a programmable wavefront array processor (WAP). The WAP blends the advantages of the dedicated systolic array and the general-purpose data-flow machine, and provides a powerful tool for the high-speed execution of a large class of matrix operations and related algorithms which have widespread applications.
Index Terms:
wavefront architecture, Asynchrony, computational wavefront, concurrency, data-flow computing, matrix data-flow language, signal processing, systolic array, VLSI array processor
Citation:
null Sun-Yuan Kung, K.S. Arun, R.J. Gal-Ezer, D.V. Bhaskar Rao, "Wavefront Array Processor: Language, Architecture, and Applications," IEEE Transactions on Computers, vol. 31, no. 11, pp. 1054-1066, Nov. 1982, doi:10.1109/TC.1982.1675922
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