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A Microprocessor-Based Office Image Processing System
October 1982 (vol. 31 no. 10)
pp. 1017-1022
L.M. Ni, Department of Computer Science, Michigan State University
This paper presents a multiprocessor system architecture and the scheduling policies of the processors which can off-load a host computer in the image processing of office documents. The objective of this system is to provide extensive image processing capabilities at minimum cost and with an acceptable interactive response time. Multiprocessor system architecture, image partitioning strategies, image processing algorithm characteristics, performance modeling, and processor scheduling policies are investigated. A prototype multiprocessor image processing system has been built at the IBM San Jose Research Laboratory.
Index Terms:
processor scheduling, Image partitioning, image processing, multiprocessor, office automation
L.M. Ni, K.Y. Wong, D.T. Lee, R.K. Poon, "A Microprocessor-Based Office Image Processing System," IEEE Transactions on Computers, vol. 31, no. 10, pp. 1017-1022, Oct. 1982, doi:10.1109/TC.1982.1675911
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