CSDL - IEEE Transactions on Computers

IEEE Computer Society (PDF)

pp. c2

Editor's Notice (PDF)

pp. 573-574

Preface: Reliable and Fault-Tolerant Computing (PDF)

null Se June Hong, IBM T. J. Watson Research Center

pp. 575-577

Test Generation Algorithms for Computer Hardware Description Languages (Abstract)

Y.H. Levendel, Bell Laboratories

P.R. Menon

pp. 577-588

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Concurrent Error Detection in ALU's by Recomputing with Shifted Operands (PDF)

J.H. Patel, Coordinated Science Laboratory, and the Department of Electrical Engineering, University of Illinois

L.Y. Fung

pp. 589-595

Single Byte Error Correcting?Double Byte Error Detecting Codes for Memory Systems (Abstract)

S. Kaneda, Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation

E. Fujiwara

pp. 596-602

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Principles of Data Structure Error Correction (Abstract)

D.J. Taylor, Department of Computer Science, University of Waterloo

J.P. Black

pp. 602-608

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Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs (PDF)

T.E. Mangir, Mangir Associates

A. Avizienis

pp. 609-616

Formal Specification and Mechanical Verification of SIFT: A Fault-Tolerant Flight Control System (Abstract)

P.M. Melliar-Smith, Computer Science Laboratory, SRI International

R.L. Schwartz

pp. 616-630

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A Validation Technique for Tightly Coupled Protocols (PDF)

H. Rudin, IBM Zurich Research Laboratory

C.H. West

pp. 630-636

REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control (Abstract)

J.-M. Ayache, Laboratoire d'Automatique et d'Analyse des Systemes, C.N.R.S.

J.-P. Courtiat

M. Diaz

pp. 637-647

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Closed-Form Solutions of Performability (Abstract)

J.F. Meyer, Departments of Electrical and Computer Engineering and Computer and Communication Sciences, University of Michigan

pp. 648-657

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Derivation and Calibration of a Transient Error Reliability Model (Abstract)

X. Castillo, Asociacion I.T.P.

S.R. McConnel

D.P. Siewiorek

pp. 658-671

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A Hierarchical, Path-Oriented Approach to Fault Diagnosis in Modular Combinational Circuits (Abstract)

M. Abramovici, Bell Laboratories

pp. 672-677

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Totally Self-Checking Checker for 1-out-of-n Code Using Two-Rail Codes (Abstract)

J. Khakbaz, Center for Reliable Computing, Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford. University

pp. 677-681

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Watchdog Processors and Structural Integrity Checking (PDF)

D.J. Lu, Center for Reliable Computing, Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University

pp. 681-685

Self-Stabilizing Programs: The Fault-Tolerant Capability of Self-Checking Programs (Abstract)

A. Mili, Department of Computer and Information Sciences, Texas A & M University

pp. 685-689

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The Containment Set Approach to Upsets in Digital Systems (Abstract)

R.E. Glaser, Department of Electrical Engineering and Computer Science, The G.W.C. Whiting School of Engineering, The Johns Hopkins University

G.M. Masson

pp. 689-692

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The Design of a Reliable Remote Procedure Call Mechanism (Abstract)

S.K. Shrivastava, Computing Laboratory, University of Newcastle upon Tyne

F. Panzieri

pp. 692-697

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A Statistical Failure/Load Relationship: Results of a Multicomputer Study (Abstract)

R.K. Iyer, Center for Reliable Computing, Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University

S.E. Butner

E.J. Mccluskey

pp. 697-706

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IEEE Copyright Form (PDF)

pp. 706