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Test Generation Algorithms for Computer Hardware Description Languages
July 1982 (vol. 31 no. 7)
pp. 577-588
Y.H. Levendel, Bell Laboratories
This paper proposes an extension of the D-algorithm to functions described in computer hardware description languages. The proposed extension is applicable to both procedural and nonprocedural languages. Methods of D-propagation through the basic constructs of these languages and test generation for circuits containing functions described in CHDL's are discussed. The fault modes considered are function variables stuck at 0 or 1, control faults, and function faults with user-specified faulty behaviors.
Index Terms:
test generation, D-algorithm, functional blocks, nonprocedural CHDL, procedural CHDL
Citation:
Y.H. Levendel, P.R. Menon, "Test Generation Algorithms for Computer Hardware Description Languages," IEEE Transactions on Computers, vol. 31, no. 7, pp. 577-588, July 1982, doi:10.1109/TC.1982.1676054
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