Design and Evaluation of a Synchronous Triangular Interconnection Scheme for Interprocessor Communications
Issue No.02 - February (1982 vol.31)
D.D. Riley , Department of Computer Science, University of Wisconsin
A message oriented interprocessor communication network is proposed that utilizes a simple fixed algorithm to store-and-forward short messages over directed data lines. The modular design of the network permits message transmission along a variable number of processors. Simulations of the network's performance indicate that for appropriate message loads the network transmits messages in time proportional to the square root of the number of processors served.
synchronous transmission, Interprocessor communications, message oriented network, multiprocessor simulation
D.D. Riley, "Design and Evaluation of a Synchronous Triangular Interconnection Scheme for Interprocessor Communications", IEEE Transactions on Computers, vol.31, no. 2, pp. 110-118, February 1982, doi:10.1109/TC.1982.1675956