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An On-Line Square Root Algorithm
January 1982 (vol. 31 no. 1)
pp. 70-75
V.G. Oklobdzija, Department of Computer Science, University of California
In this correspondence a systematic derivation of an on-line square root algorithm is presented. The algorithm operates on variables represented in the normalized radix r floating-point system in a digit-by-digit fashion with an on-line delay of 1. The approach used in deriving the square root algorithm is described in detail. The basic characteristics of hardware-level implementation are also discussed.
Index Terms:
redundant number systems, Floating-point square root algorithm, modular LSI/VLSI implementation, on-line arithmetic
Citation:
V.G. Oklobdzija, M.D. Ercegovac, "An On-Line Square Root Algorithm," IEEE Transactions on Computers, vol. 31, no. 1, pp. 70-75, Jan. 1982, doi:10.1109/TC.1982.1675887
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