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Multiple Fault Testing of Large Circuits by Single Fault Test Sets
November 1981 (vol. 30 no. 11)
pp. 855-865
V.K. Agarwal, Department of Electrical Engineering, McGill University
A general theory is presented in this paper to quantitatively predict the multiple fault coverage capability of single fault detection test sets in combinational circuits. The theory is unique in that it provides greatest lower bounds on the coverage capability of all possible circuits of concern by a simple table-look-up process. All the results known so far in this area are seen to be special cases of the theory. The more important contribution of the theory, however, is seen in its predictions made for reconvergent internal fan-out circuits. Most unexpectedly, the multiple fault coverage of such circuits by single fault test sets is discovered to be extremely precarious. Such results clearly have alarming implications in LSI and VLSI testing.
Index Terms:
testing of large circuits, Capability of single fault test sets, coverage bounds, coverage table, generic name, G-expressions, multiple fault coverage, prediction algorithm
Citation:
V.K. Agarwal, A.S.F. Fung, "Multiple Fault Testing of Large Circuits by Single Fault Test Sets," IEEE Transactions on Computers, vol. 30, no. 11, pp. 855-865, Nov. 1981, doi:10.1109/TC.1981.1675716
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