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Issue No.10 - October (1981 vol.30)
pp: 811-812
T. Kanai , Department of Electrical and Computer Engineering, Lehigh University
In a memory system with skewing reconfiguration, a virtual memory address is encoded by an address encoder to avoid using a faulty memory area. This correspondence shows one method to improve the reliability of the address encoder by encoding a virtual memory address together with data to an error correcting code. Only a few additional gates are required for the implementation if the memory system has already employed an error correcting code.
reliability, Computer memory, error correcting code, fault tolerance, memory reconfiguration
T. Kanai, "An Improvement of Reliability of Memory System with Skewing Reconfiguration", IEEE Transactions on Computers, vol.30, no. 10, pp. 811-812, October 1981, doi:10.1109/TC.1981.1675699
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