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Synthesis of Generalized Parallel Counters
September 1981 (vol. 30 no. 9)
pp. 699-703
| ASCII Text | x | ||
| S. Dormido, M.A. Canto, "Synthesis of Generalized Parallel Counters," IEEE Transactions on Computers, vol. 30, no. 9, pp. 699-703, September, 1981. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1981.1675870, author = {S. Dormido and M.A. Canto}, title = {Synthesis of Generalized Parallel Counters}, journal ={IEEE Transactions on Computers}, volume = {30}, number = {9}, issn = {0018-9340}, year = {1981}, pages = {699-703}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1981.1675870}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Synthesis of Generalized Parallel Counters IS - 9 SN - 0018-9340 SP699 EP703 EPD - 699-703 A1 - S. Dormido, A1 - M.A. Canto, PY - 1981 KW - parallel counters KW - Digital counters KW - FAST multipliers KW - multiple-input adders KW - parallel-counter networks VL - 30 JA - IEEE Transactions on Computers ER - | |||
Synthesis of generalized equal column parallel counters from smaller ones is presented. The notation used for a general counter is (n ? N; d), where n is the number of input columns, N is the number of input bits in each column, and d = s ? n (s = 2, 3,???) is the number of bits in the output word.
Index Terms:
parallel counters, Digital counters, FAST multipliers, multiple-input adders, parallel-counter networks
Citation:
S. Dormido, M.A. Canto, "Synthesis of Generalized Parallel Counters," IEEE Transactions on Computers, vol. 30, no. 9, pp. 699-703, Sept. 1981, doi:10.1109/TC.1981.1675870
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